Conventionally, as a method for connecting a semiconductor chip and a wiring board, there is known a method for mounting the semiconductor chip face-down on the wiring board and connecting the semiconductor and the wiring board via a bump (a protruding electrode) (see Patent Document 1).
As a semiconductor device, there is known a semiconductor module in which a plurality of semiconductor chips is three-dimensionally stacked on a substrate (see Patent Document 1).
FIG. 51 is a sectional view of an example of a conventional face-down connection structure (a flip-chip connection structure). In the case of face-down connection, a semiconductor chip 120 is mounted on a substrate 110 with a circuit forming surface facing the substrate side. The substrate 110 is a wiring board. An electrode pad 111 of the substrate 110 and an electrode pad 121 of the semiconductor chip 120 are connected by bumps 112 and 122. The semiconductor chip 120 is fixed on the substrate 110 by a bonding layer 130 made of sealing resin.
FIG. 52 is a sectional view of a conventional three-dimensional stacked semiconductor module. As shown in FIG. 52, a plurality of semiconductor chips 220 is stacked on a substrate 210. Through via-holes 221 are provided in the semiconductor chips 220. Micro-bumps 222 are provided on front and rear surfaces of the semiconductor chips 220 in positions corresponding to the through via-holes 221. The micro-bumps 222 are connected to each other via the through via-holes 221. Bonding layers 230 are provided between the substrate 210 and the semiconductor chip 220 and among the semiconductor chips 220. The plurality of semiconductor chips 220 is fixed on the substrate 210. The substrate 210 is an intermediate substrate called interposer and is mounted on another wiring board via external connection bumps 211.
Patent Document 1: Japanese Patent Laid-Open No. 2005-109419